Analog IC Design and Verification Engineer

About the role

Neuralink is at the forefront of developing groundbreaking technology that enables a two-way communication interface with the brain. Our mission is to create devices that can restore mobility for individuals with paralysis, improve vision for the visually impaired, and revolutionize how humans interact with digital environments. As an Analog IC Design and Verification Engineer, you will play a vital role in designing and verifying the analog integrated circuits that form the core of our brain-machine interface systems. You will work closely with multidisciplinary teams to develop innovative solutions that meet strict performance, reliability, and safety standards. This position offers an exciting opportunity to contribute to cutting-edge neurotechnology, pushing the boundaries of what is possible in neural engineering and integrated circuit design.

Key facts

What you'll do

• Design and develop analog circuit components and subsystems, addressing various technical challenges such as noise, mismatch, distortion, power consumption, and cost, while ensuring the designs meet all specified performance and reliability requirements.
• Collaborate with layout teams to oversee and manage block-level layout activities for various analog components, ensuring that physical implementation aligns with design specifications and performance goals.
• Develop and implement comprehensive verification strategies for specific IP blocks or entire chip sections, including creating detailed simulation plans, performing intricate simulations, and analyzing results related to power consumption, speed, linearity, yield, and robustness.
• Create, program, and execute complex test procedures to validate the functionality and performance of analog circuits, reviewing test results conducted by junior engineers, diagnosing issues, and providing technical guidance to resolve problems efficiently.
• Work closely with internal teams, including digital design, system engineering, and layout, to ensure seamless integration of analog components within the overall system architecture.
• Engage with external vendors and third-party fabrication and testing facilities to coordinate design hand-offs, fabrication, and testing processes, ensuring that all specifications are met and that the final silicon performs as intended.
• Participate in design reviews, providing technical input and feedback on analog circuit designs, verification plans, and layout considerations to improve overall design quality and manufacturability.
• Contribute to the continuous improvement of design methodologies, verification processes, and documentation standards to enhance efficiency and quality across projects.
• Document design and verification activities thoroughly, including detailed reports, test plans, and validation results, to support compliance, troubleshooting, and future development efforts.
• Stay current with advancements in analog circuit design, verification techniques, and CMOS process technologies, applying new knowledge to improve design robustness and efficiency.
• Support troubleshooting and failure analysis activities during silicon validation, providing technical expertise to identify root causes of issues and implement corrective actions.

Requirements

• A Bachelor's degree in electrical engineering, physics, or a related technical discipline, with a minimum of 5 years of relevant industry experience following the completion of the degree.
• Extensive hands-on experience (at least 5 years) in analog and mixed-signal CMOS circuit design, including familiarity with a variety of circuit types such as delta-sigma ADCs, SAR ADCs, DACs, voltage-controlled oscillators (VCOs), phase-locked loops (PLLs), delay-locked loops (DLLs), audio codecs, Class D audio amplifiers, high-speed physical layer (PHY) circuits, and serializer/deserializer (SERDES) interfaces.
• Proven track record of silicon validation, including designing test structures, interpreting test data, and troubleshooting issues during fabrication and testing phases.
• Strong analytical and problem-solving skills, with a passion for building innovative solutions and a willingness to tackle complex technical challenges regularly.
• Ability to work effectively in a collaborative team environment, communicating complex technical concepts clearly to colleagues with diverse backgrounds.
• Experience with circuit simulation tools such as SPICE, and verification methodologies including Monte Carlo analysis, corner simulations, and yield analysis.
• Familiarity with layout design and verification tools, ensuring that physical implementation meets electrical and manufacturing specifications.
• Knowledge of manufacturing process considerations, including design for manufacturability and yield optimization.
• Ability to document technical activities thoroughly, including design specifications, verification plans, and test reports.

Nice to have

• A Master's degree or PhD in electrical engineering, physics, or a related discipline, providing deeper expertise in analog circuit design and verification.
• Experience in designing circuits specifically for mass production, understanding the constraints and requirements of high-volume manufacturing.
• Background in laboratory testing of high-precision analog and mixed-signal integrated circuits, including familiarity with test equipment such as oscilloscopes, network analyzers, and spectrum analyzers.
• Knowledge of functional modeling and logic verification using hardware description languages such as Verilog AMS and SystemVerilog, supporting mixed-signal verification efforts.
• Experience working with advanced CMOS FinFET process technologies, including design considerations unique to these nodes.
• Skills in scripting and automation using languages like Python, Tcl, or MATLAB to streamline simulation, testing, and data analysis workflows.
• Familiarity with digital design integration, including understanding how analog and digital components interface within complex systems.

Skills & tools

• Analog and mixed-signal circuit design and analysis
• CMOS process technology and device physics
• Circuit layout, verification, and parasitic extraction
• Simulation tools such as SPICE, Spectre, or HSPICE
• Verification methodologies, including Monte Carlo, corner, and yield analysis
• Programming and scripting for automation and data analysis (e.g., Python, MATLAB, Tcl)
• Test equipment and lab measurement techniques for analog IC validation
• Documentation and technical report writing
• Collaboration tools and version control systems

Practical notes

The salary range for this position is between $125,000 and $291,000 USD. Actual compensation will be determined based on individual skills, experience, and educational background. Neuralink offers equity compensation in the form of Restricted Stock Units (RSUs) to all full-time employees, in addition to the base salary. The role is based on-site in South San Francisco, California, and requires physical presence at the office. Candidates should be prepared to participate in a comprehensive interview process, including technical assessments and discussions of previous projects. Neuralink values innovation, collaboration, and a passion for advancing neurotechnology, and we seek candidates eager to contribute to our mission of transforming human health and capabilities through cutting-edge engineering.