Systems Engineer, Data Center Debug

About the role

This role centers on hardware and system-level debugging for next-generation AI compute platforms. The position operates in a hybrid Toronto-based setup within a RISC-V and AI silicon environment. Success requires collaboration across hardware, firmware, and software teams.

Software engineers turn product ideas into working code. Engineers work in small teams, review each other's work, and ship in small batches. Most teams follow agile practices such as sprints and daily standups. Engineers also write tests, fix bugs, and improve performance. The field values clear communication as much as technical skill. Engineers spend part of every week on planning, code review, and debugging, not just writing new code. The ability to explain a technical decision in plain words separates strong engineers from the rest.

Key facts

What you'll do

Diagnostics verify silicon, board, and system reliability for AI accelerator platforms across complex hardware.

System-level failures are investigated using oscilloscopes, logic analyzers, and protocol analyzers within laboratory environments.

Root causes are identified by correlating schematics, register states, telemetry, and firmware behavior. Cross-functional collaboration aligns metal, Ethernet, power, thermal, and firmware layers to drive timely outcomes for complex hardware issues.

Requirements

Experience in hardware debug and post-silicon bring-up for CPU, SoC, or ASIC systems handles complex issues across chips, systems, firmware, and software, with candidates managing intricate problems end to end. Knowledge of processor architecture and microarchitecture (RISC-V, x86, or ARM) applies alongside debug and trace methodologies such as iJTAG, and engineers use this understanding during root-cause analysis.

Comfort in laboratory settings with a passion for building debug tools, automation, and scalable methodologies guides daily work. Technicians employ lab equipment and frameworks to accelerate diagnosis while working with ASIC, firmware, software, and validation teams. Issues spanning metal, Ethernet, power, thermal, and firmware layers are resolved through collaboration across the full hardware stack.

Practical notes

export-controlled technology. The role requires compliance with U.S. and international locations. Commerce Department, and the offer may be rescinded if employment is not possible under U.S. Typical interview steps

Hiring for engineering roles usually starts with a recruiter screen, followed by one or two technical rounds. Candidates often solve a coding problem, discuss past projects, and answer system design questions. Some loops include a take-home task. Final rounds typically cover team fit and give candidates a chance to ask questions. Interviewers look for how you break down an unfamiliar problem, not just whether you reach the answer. Practicing a few problems aloud and reviewing your own past projects are the best preparation.

Good to know

Roles in this field focus on hardware-level debugging and system validation across complex silicon. Professionals work with high-speed interfaces such as GDDR/DDR, PCIe, and Ethernet/SerDes.

Debug infrastructure and methodologies scale across prototypes and production workflows. RISC-V CPU and AI silicon development rely on cross-functional collaboration among ASIC, firmware, and software teams. Toolchains often include Python and C for diagnostic automation and lab equipment integration.

Questions to ask

Good questions to ask the employer in the interview: what does success look like in the first six months, how is the team structured, what is the current biggest challenge, and how are decisions made. Asking about growth paths and the review process is also well received. Employers expect questions, and good ones show preparation.

Career growth

Engineering careers usually progress from individual contributor to senior, staff, and principal levels. Some engineers move into management and lead teams of five to twenty people. Others stay on the technical track. Growth follows demonstrated impact, not tenure alone. A typical engineering ladder has clear levels with defined expectations for scope, quality, and mentorship. Moving up usually requires owning outcomes end to end rather than completing assigned tickets.