Physical Design Engineer II

About the role

SpaceX is developing advanced silicon solutions that support the Starlink satellite network and the global infrastructure that keeps it running. This role focuses on the end-to-end physical implementation of next-generation ASICs, the chips that carry high-speed internet connectivity between satellites, gateways, and users around the world. You will join a multidisciplinary engineering team that drives chip performance and reliability for both space and ground hardware. The scope stretches across the full physical design flow, from early feasibility studies through floorplanning, synthesis, place and route, power grid generation, and the signoff checks that release a device to manufacturing. Because this silicon powers a network serving customers at scale, the work prioritizes timing integrity, power efficiency, and dependable operation. This is a role for engineers who enjoy deep technical problems and the satisfaction of seeing their designs enter service across a growing orbital network. You will carry your blocks from feasibility to closure yourself, working beside the designers and integration engineers who depend on your results, so communicating constraints and tradeoffs clearly is part of the job.

Key facts

What you'll do

• Execute partition synthesis and physical implementation tasks, including floorplanning, place and route, and power grid generation, to bring each design into silicon.
• Perform signoff checks for timing, noise, electromigration, voltage drop, and logic equivalency, and close out any findings.
• Create and refine physical design methodologies and automation scripts that raise the team's throughput and consistency.
• Collaborate with ASIC design teams to run feasibility studies and define realistic power, timing, and area targets.
• Debug and resolve congestion, timing, and flow issues as they arise so designs stay on schedule and on quality.
• Keep physical design standards such as static timing analysis and low-power implementation tight across the team.

Requirements

• Bachelor degree in computer science, computer engineering, or electrical engineering.
• 3+ years of professional experience in physical design flow development or RTL2GDSII implementation.
• Ability to work extended hours and weekends when project milestones require it.

Nice to have

• Familiarity with industry-standard EDA tools and the algorithms behind them.
• Knowledge of CMOS digital design, standard cell libraries, and power dissipation in deep submicron processes.
• Experience with FinFET technology and solid-state physics.
• Experience with CMOS analog physical design.
• Understanding of DFT, scan, LBIST, and MBIST.
• Scripting capability in Python, Perl, TCL, bash, csh, or Makefile.
• Ability to drive your own block to closure and communicate tradeoffs clearly to the design team.

Skills & tools

• RTL2GDSII
• Physical design flow development
• Static timing analysis (STA)
• Physical verification
• EDA tools

Practical notes

• This position is subject to ITAR regulations, requiring applicants to be a U.S. citizen, lawful permanent resident, asylee, or refugee.
• Compensation includes potential stock options, long-term incentives, discretionary bonuses, and an employee stock purchase plan.
• Benefits include medical, dental, and vision coverage, 401(k), life insurance, disability insurance, paid parental leave, 3 weeks of vacation, 10+ holidays, and 5 days of sick leave.
• SpaceX is an Equal Opportunity Employer. Reasonable accommodations for the application process are available upon request.
• The team works across the full lifecycle of the silicon, so engineers at all levels get exposure to the whole flow from feasibility through tapeout, rather than a single slice of it.
• The role offers the opportunity to grow into broader ownership over time, as the team values deep knowledge of the flow and how it fits into the product.

About the company

Based in Starbase, Texas, a company pursues work in spaceflight, telecom, and artificial intelligence. A unit handles rocket launches, leading yearly orbital counts beyond other national and commercial teams. Another unit runs Starlink, a satellite communications firm. A third area, through SpaceXAI, advances Grok and AI integration with X, while managing data center operations. Roles often cross these paths. Candidates with engineering, software, or operations backgrounds may find chances to join projects that span launch, connectivity, and machine learning efforts in this Texas-based enterprise.