Electrical Engineer, Silicon Reliability Test
Job description
About the role
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. As an electrical engineer on the Starlink silicon reliability team, you will sit at the intersection of electrical, packaging, semiconductor, and manufacturing engineering. You will own package-level and wafer-level reliability testing, including HTOL and other accelerated life tests, root cause of silicon and packaging failures, and driving design and process changes to improve microelectronics reliability across Starlink devices. Your focus will be on the qualification of new silicon packages, wafer-level reliability, and supporting high-volume production in a demanding schedule environment.
Key facts
What you'll do
Plan, develop, execute, and analyze package-level and wafer-level reliability test campaigns aligned with JEDEC and related standards to qualify new silicon for Starlink programs.
Develop and procure custom test hardware, burn-in boards, and environmental chambers and systems required for package-level and wafer-level reliability testing.
Design and develop PCBs and electrical interfaces for reliability test fixtures, sockets, and integrated monitoring systems.
Write and maintain software, automation scripts, and data acquisition tools in Python to control test equipment, log telemetry, perform real-time monitoring, and analyze large reliability datasets.
Perform hands-on debugging and electrical characterization to drive root cause analysis and corrective action for silicon, package, and interconnect failures observed in reliability testing, production, or the field.
Utilize advanced diagnostic and test tools such as oscilloscopes, power supplies, vector network analyzers, custom firmware, scripts, thermal chambers, and parametric analyzers to characterize devices under stress and isolate failure mechanisms.
Run reliability failure investigations, coordinating efforts across silicon design, packaging, manufacturing, and reliability teams, and communicate findings and recommendations to leadership and cross-functional partners.
Analyze reliability data using Weibull analysis, acceleration models, and statistical methods to predict field performance, document failure modes, and drive design and process improvements for higher yield and reliability.
Partner with design, packaging, software, test, and manufacturing engineering teams to deliver reliable silicon hardware by informing product design, package selection, process changes, and test coverage.
Support the qualification and ramp of new silicon packages, wafer-level reliability methods, and high-volume production monitoring to meet demanding launch and deployment timelines.
Maintain detailed test logs, traceability records, and documentation to ensure reliability evidence supports quality, compliance, and continuous improvement activities.
Execute defined test plans while identifying new test opportunities and experiment designs to proactively uncover reliability risks before they impact production or field performance.
Assist in the development and maintenance of in-house test methodologies, fixtures, and standards to scale reliability capabilities across multiple programs and technologies.
Contribute to the reliability roadmap by evaluating emerging package technologies, test techniques, and diagnostics to future-proof the Starlink silicon infrastructure.
Requirements
Bachelor's degree in electrical engineering, electronics engineering, or other engineering discipline.
1+ years of experience in semiconductor reliability, packaging reliability, consumer electronics, aerospace, automotive, or similar high-reliability industry.
Masters degree or PhD in electrical engineering, electronics engineering, or a related field with a focus on semiconductors, characterization, or test.
Hands-on experience with HTOL or other accelerated life tests for packages or TDDB, EM, HCI, and other wafer-level tests.
Experience developing or procuring custom test hardware, burn-in boards, sockets, or fixturing for reliability testing.
Experience designing PCBs for test fixtures or high-reliability applications.
Familiarity with programming and automation/scripting languages such as Python preferred; C++, SQL, or similar experience is beneficial for test control, data logging, and analysis.
Proficiency in understanding PCB schematics, layout tools, and electrical interfaces for semiconductor packages.
Knowledge of JEDEC standards such as JESD22, AEC-Q200/AEC-Q100, MIL-STD-202/883, IPC, or related reliability physics-of-failure methods.
Experience working in a fast-paced, iterative design, manufacturing, and qualification environment within semiconductor, consumer electronics, aerospace, automotive, or related industries.
Ability to work overtime and weekends as needed to meet program schedules and reliability commitments.
Nice to have
None specified.
Practical notes
This role may require overtime and weekend work as needed.
Travel is not explicitly mentioned in the provided source and is omitted.
No visa sponsorship details are provided in the source.
No specific deadline for applications is provided in the source.