Software Engineer, Silicon Design Methodology

About the role

This position sits at the intersection of hardware development and software infrastructure where you will own the foundational methodology that allows a focused silicon team to move with speed and confidence. You will design and evolve the software abstractions that model, simulate, and verify complex AI silicon before tapeout, ensuring that every architectural hypothesis can be explored rapidly. By constructing scalable frameworks and data models, you will turn ambiguous design requirements into precise, executable specifications that guide implementation decisions. You will act as a force multiplier for hardware engineers by automating error-prone tasks, improving debuggability, and providing clear visibility into design behavior. In this role, you will collaborate deeply with architects and verification experts to translate high-level silicon goals into robust software workflows. You will build tools that expose early performance and power characteristics, de-risking implementation choices and accelerating the path to production silicon. Ultimately, your work will directly influence the velocity and quality of the custom chips that power OpenAI's frontier models.

Key facts

What you'll do

Define and scale the end-to-end design methodology for first-party AI chip development, creating reusable workflows that reduce iteration cycles and amplify engineering throughput.

Model hardware structures, configurations, and experimental results using consistent software abstractions that bridge architecture, verification, and systems software concerns.

Automate critical engineering workflows, adding observability, testability, and reproducibility so that teams can detect regressions and understand behavior instantly.

Partner with architects, RTL designers, verification engineers, compiler engineers, and systems software engineers to gather requirements and deliver software solutions that withstand real-world pressure.

Construct simulation frameworks and data models that expose design risks early, enabling faster iteration and more informed performance and implementation tradeoffs.

Develop tools that integrate RTL and IP components into coherent SoC designs, ensuring that interfaces, protocols, and constraints are managed with precision.

Create APIs, object models, and data models for complex systems, prioritizing extensibility, correctness, and usability as the silicon program evolves.

Build regression systems, automation pipelines, and diagnostic tooling that improve confidence in design decisions across distributed and cross-functional teams.

Support the construction of world-class silicon by applying methodology and tooling to real design problems, turning abstract requirements into concrete, verifiable artifacts.

Adapt to rapidly changing architecture and design needs, balancing immediate program deliverables with the long-term health and scalability of the software platform.

Contribute across multiple domains of software and hardware development, switching context between low-level implementation details and high-level system strategy.

Work within a fast-moving environment where requirements are fluid and solutions must be delivered with clarity, rigor, and speed.

Champion best practices in software engineering for hardware teams, including version control, testing, code review, and documentation.

Enable non-expert users to leverage complex tooling through thoughtful interfaces, documentation, and workflow design that reduces cognitive load.

Requirements

You must have strong software engineering skills in C++, Python, Rust, or similar systems-oriented languages, with a proven track record of writing clean, maintainable, and performant code.

You must have experience building engineering infrastructure, developer tools, simulation frameworks, EDA/CAD tooling, compilers, or verification systems that support complex design flows.

You must understand digital design and computer architecture well enough to translate silicon-development needs into useful software abstractions and to question underlying assumptions.

You must have hands-on experience integrating RTL and IP components into an SoC, navigating block-level design constraints, and managing interface protocols.

You must have designed APIs, object models, or data models for complex systems and demonstrated care for extensibility, correctness, and usability in the face of evolving requirements.

You must be comfortable automating multi-stage workflows, building robust regression systems, and improving reproducibility, observability, and debugging across teams.

You must be able to reason across architecture, design, verification, performance modeling, and software boundaries, connecting high-level intent to low-level implementation details.

You must enjoy partnering closely with domain experts and translating loosely defined engineering needs into durable tools, clear specifications, and repeatable processes.

You must thrive in rapidly evolving environments, balancing immediate program needs against the long-term investment in platform quality and maintainability.

You must be eligible for employment in the United States without requiring sponsorship now or at any time during the duration of employment for this role.

To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.

Nice to have

Experience contributing to open-source infrastructure projects that impact large-scale systems or hardware workflows.

Familiarity with formal methods, static analysis, or property-based verification as applied to hardware or software systems.

Exposure to machine learning workloads, AI accelerators, or high-performance compute platforms.

Practical notes

This role requires U.S. employment eligibility without sponsorship.

Candidates with arrest or conviction records will be considered in accordance with company policy and applicable laws, including the San Francisco and Los Angeles County Fair Chance Ordinances and the California Fair Chance Act.