Senior Semiconductor Reliability Engineer - Advanced Silicon & Packaging

About the role

You will manage the reliability roadmap for high-performance AI hardware intended for datacenter environments. This position involves overseeing the entire lifecycle of silicon and packaging, from initial technology selection through to mass production. You will own the strategy for advanced silicon nodes and packaging architectures, ensuring long-term product integrity and performance predictability. The role requires managing risk assessment and qualification sign-off processes to align with both internal quality goals and external customer requirements. You will conduct failure analysis across interconnects and packaging systems to identify root causes and drive corrective actions. Collaboration with foundries, OSAT partners, and internal engineering groups is central to resolving cross-functional reliability challenges. You will mentor team members and refine internal reliability methodologies to improve efficiency and consistency. This position directly influences the quality and durability of Graphcore's silicon and packaging solutions in demanding datacenter applications.

Key facts

What you'll do

• Direct the reliability strategy for advanced silicon nodes and packaging architectures.
• Manage risk assessment and qualification sign-off processes for new technologies.
• Conduct failure analysis across interconnects and packaging systems to determine root causes.
• Coordinate with foundries, OSAT partners, and internal engineering groups on reliability issues.
• Mentor team members and refine internal reliability methodologies for continuous improvement.
• Oversee the lifecycle of silicon and packaging from technology selection to mass production.
• Ensure alignment of reliability activities with JEDEC standards and industry best practices.
• Drive the qualification and validation of packaging solutions under real-world operational conditions.
• Analyze test data from HTOL, thermal cycling, thermal shock, and reflow testing to assess robustness.
• Utilize X-ray and CSAM analysis for package defect diagnosis and detailed root-cause investigations.
• Develop and maintain reliability assessment plans that address electromigration (EM) and time-dependent dielectric breakdown (TDDB).
• Monitor bias temperature instability (BTI) and hot carrier injection (HCI) effects across semiconductor structures.
• Collaborate with quality teams to implement corrective and preventive actions for identified failures.
• Support the development of reliability models that predict field behavior and end-of-life performance.

Requirements

• Hold a Bachelor or Master degree in Electrical Engineering, Materials Science, Physics, Mechanical Engineering, or a related field.
• Bring professional experience in semiconductor reliability covering silicon, BEOL, interconnects, or advanced packaging.
• Demonstrate technical knowledge of electromigration (EM), time-dependent dielectric breakdown (TDDB), bias temperature instability (BTI), and hot carrier injection (HCI).
• Show practical experience with HTOL, thermal cycling, thermal shock, reflow testing, and adherence to JEDEC standards.
• Exhibit proficiency in using X-ray analysis for internal defect identification and failure diagnosis.
• Demonstrate competence in CSAM analysis for detecting delamination and structural flaws in packages.
• Possess a strong understanding of JEDEC reliability standards and their application in qualification flows.
• Have hands-on experience with HTOL and thermal stress testing to evaluate product robustness.
• Apply knowledge of physics-of-failure principles to analyze degradation mechanisms in advanced packages.
• Communicate complex reliability data clearly to cross-functional teams and stakeholders.
• Work effectively in a team environment while maintaining attention to detail and accuracy.
• Adapt to evolving technologies and shifting project priorities in a fast-paced setting.
• Take ownership of reliability tasks and manage multiple priorities with strong organizational skills.
• Contribute to the continuous improvement of reliability processes and methodologies.

Nice to have

• Experience with advanced packaging technologies such as fan-out wafer level packaging (FOWLP) or silicon interposers.
• Familiarity with reliability qualification for high-bandwidth memory (HBM) interfaces.
• Prior work in a datacenter or AI accelerator semiconductor environment.
• Knowledge of defectivity analysis techniques using advanced imaging and tomography methods.
• Exposure to statistical analysis tools for reliability data evaluation and trend prediction.
• Understanding of supply chain qualification processes for outsourced packaging services.

Practical notes

• Visa sponsorship is available for this position.
• Benefits include up to 5 percent matched pension, phantom equity, income protection, and life assurance.
• Flexible working arrangements and generous leave policies are provided.
• Additional perks include private medical insurance, dental cover, a health cash plan, and a cycle to work scheme.
• The office features free food and an on-site barista.