Principal Debug Validation Engineer

About the role

You will join a cross-functional group focused on validating high-performance AI hardware. This role centers on bringing new silicon to life and managing the full validation lifecycle from post-silicon arrival to final product characterization. You are responsible for architecting and executing validation tests using bare metal C/C++ on FPGA and emulator environments before silicon arrives. The position requires executing and debugging validation test plans on initial silicon samples to ensure functional correctness and performance alignment. You will build and maintain automated regression suites and test frameworks using Python to streamline testing efficiency and reliability. Partnering with multidisciplinary teams is essential to troubleshoot defects, perform root cause analysis, and drive issues to resolution. You will improve existing test methodologies and infrastructure through continuous process refinement and innovation. Reporting project milestones and technical progress clearly to program management ensures alignment and transparency across stakeholders.

Key facts

What you'll do

• Architect and execute validation tests using bare metal C/C++ on FPGA and emulator environments before silicon arrives.
• Execute and debug validation test plans on initial silicon samples to uncover functional discrepancies and performance bottlenecks.
• Build and maintain automated regression suites and test frameworks using Python to ensure scalability and repeatability of tests.
• Partner with multidisciplinary teams to troubleshoot defects and identify root causes through systematic analysis and cross-functional collaboration.
• Improve existing test methodologies and infrastructure through continuous process refinement to enhance efficiency and coverage.
• Report project milestones and technical progress to program management to provide clear status updates and support decision-making.
• Mentor junior team members and provide technical leadership on complex validation tasks to elevate team capability and consistency.
• Collaborate with design and system engineers to develop test strategies that align with product specifications and validation objectives.
• Drive the validation of memory subsystem protocols and data flow to ensure compliance with internal and external standards.
• Participate in the development of bringup plans and validation milestones for new silicon revisions and product lines.
• Conduct performance characterization and analysis to validate that hardware meets expected throughput and latency targets.
• Document validation procedures, results, and anomalies in detail to create a clear audit trail and support future debugging efforts.

Requirements

• Proficiency in bare metal and embedded C/C++ is essential for developing and debugging low-level validation tests and drivers.
• Hands-on experience with post-silicon validation in digital ASIC environments is required to navigate complex hardware scenarios.
• Practical knowledge of Python and Linux is mandatory for building automation, scripts, and test infrastructure.
• Understanding of machine learning workloads and their application helps in designing relevant and effective validation tests.
• Ability to diagnose and resolve complex technical issues across different domains is critical for root cause analysis.
• Strong communication skills are necessary for explaining technical concepts and coordinating with diverse teams effectively.
• Willingness to work closely with hardware and software engineers to validate integrations across multiple layers of the stack.
• Capacity to manage multiple priorities in a fast-paced environment while maintaining attention to detail and accuracy.

Nice to have

• 5 to 10 years of professional experience in validation or related technical fields.
• Experience managing and building multi-site engineering teams to coordinate validation efforts across locations.
• Driver development experience with PCIe, Ethernet, or memory technologies like LPDDR, DDR, and HBM.
• Familiarity with peripherals including I2C, I3C, and SPI to validate interface communications and control mechanisms.
• Knowledge of mixed-signal components such as high-speed PHYs, PLLs, and IC communication protocols for deeper debug insight.
• Experience with Arm CPUs, System IP, debug tools, and AMBA protocols to understand system-level integration.
• Background in failure analysis, characterization, test development, or statistical analysis to support data-driven decisions.

Practical notes

This role is based in Austin, Texas, and operates on a full-time engagement basis. Candidates must be eligible to work in the United States without sponsorship for this position. No specific hours, travel requirements, visa conditions, or deadlines are outlined in the current job description.