Sr. Staff, Software Machine Learning Test Engineer

About the role

Become a foundational member of the software validation group responsible for qualifying D Matrix's novel AI compute platform. This position centers on architecting and executing comprehensive automation strategies that span silicon bring-up, compiler toolchains, runtime execution, and model deployment workflows. You will operate at the intersection of hardware architecture and machine learning software, building the continuous integration pipelines that gate every release candidate. The scope demands deep technical ownership of test infrastructure scalability, ensuring that large language model accuracy, performance benchmarks, and robustness metrics are continuously verified against evolving hardware targets. Success in this role directly accelerates the delivery of next-generation inference capabilities to production environments.

Key facts

What you'll do

• Architect and implement end-to-end automated test suites that validate the functional correctness and performance of D Matrix AI accelerator hardware and the associated software stack components.
• Design, build, and maintain a scalable, high-throughput testing infrastructure capable of qualifying new silicon revisions, compiler updates, and runtime libraries across diverse hardware configurations.
• Develop and extend test frameworks using Pytest and GitLab CI/CD to orchestrate component-level unit tests, integration verification, and full system qualification pipelines for AI workloads.
• Create specialized automation pipelines for evaluating large language model inference accuracy, throughput benchmarking, latency profiling, and adversarial robustness testing on target hardware.
• Collaborate daily with globally distributed engineering teams spanning ML kernel development, compiler optimization, runtime systems, hardware architecture definition, and foundational model research to define test requirements and triage failures.
• Define and enforce quality gates, coverage metrics, and release criteria that prevent regressions in model numerics, operator fusion logic, and memory management subsystems.
• Investigate and root-cause complex failures arising from hardware-software interaction, including numerical precision drift, concurrency deadlocks, and power/thermal throttling effects on inference stability.
• Automate the generation and maintenance of synthetic and real-world model test corpora, ensuring coverage across transformer architectures, convolutional networks, and emerging model topologies.
• Mentor junior engineers on test design patterns, debugging methodologies for heterogeneous compute, and best practices for CI/CD pipeline reliability and observability.
• Contribute to the strategic roadmap for test infrastructure evolution, evaluating new tools, simulation models, and emulation platforms to shift-left validation earlier in the development lifecycle.
• Drive the automation of performance regression detection, establishing baselines for key benchmarks and alerting on deviations caused by compiler or runtime changes.
• Participate in pre-silicon verification activities by developing test cases executable on RTL simulators and FPGA prototypes to accelerate post-silicon bring-up velocity.

Requirements

• Bachelor's or Master's degree in Computer Science, Electrical Engineering, Computer Engineering, or a closely related technical discipline.
• Minimum of seven years of professional industry experience in software quality assurance, test automation, or validation engineering roles.
• Demonstrated deep understanding of Large Language Model architectures, transformer internals, attention mechanisms, and the fundamentals of machine learning training and inference workflows.
• Expert-level proficiency in Python programming, including advanced data structures, concurrency primitives, asyncio patterns, and performance profiling within Linux environments.
• Extensive hands-on experience designing, deploying, and maintaining CI/CD pipelines using GitLab CI/CD (or equivalent platforms like Jenkins, Azure DevOps) for complex hardware/software integration projects.
• Proven ability to operate with high autonomy in ambiguous, fast-paced environments while effectively collaborating across geographically dispersed, cross-functional teams.
• Strong working knowledge of Linux kernel internals, device driver interaction, containerization (Docker/Podman), and bare-metal provisioning for test lab automation.
• Experience with version control systems (Git) and code review workflows, enforcing coding standards and architectural consistency within test codebases.

Nice to have

• Prior experience operating within an early-stage startup or small, high-impact engineering team where process definition and tool selection were self-directed.
• Intimate familiarity with the internal layer composition, weight quantization techniques (INT8, FP8, GPTQ, AWQ), and deployment optimization passes for Deep Learning models.
• Direct hands-on history testing Deep Learning frameworks, specifically TensorFlow, PyTorch, and Hugging Face Transformers, including custom operator development and graph optimization verification.
• Practical knowledge of GitLab CI/CD infrastructure administration, including runner fleet management, cache optimization, and pipeline-as-code templating for monorepos.
• Exposure to hardware bring-up phases, including JTAG debugging, register-level validation, and firmware/software co-validation methodologies.
• Experience with infrastructure-as-code tools (Terraform, Ansible) for managing test lab environments and cloud-based GPU/accelerator clusters.

Skills & tools

• Python (Advanced)
• Linux Systems Programming & Administration
• GitLab CI/CD (Pipeline Authoring & Administration)
• Pytest (Framework Extension & Plugin Development)
• Large Language Models (Architecture, Quantization, Deployment)
• Machine Learning Fundamentals (Training, Inference, Evaluation)
• Deep Learning Frameworks (PyTorch, TensorFlow, Transformers)
• Hardware/Software Co-validation
• Git (Advanced Workflows)
• Containerization (Docker, Podman, Kubernetes basics)
• Performance Profiling & Benchmarking
• RTL Simulation / FPGA Prototyping (Awareness)

Practical notes

D Matrix does not accept resumes or candidate submissions from external recruiting agencies or third-party vendors; all applications must be submitted directly through the official company careers portal. The hybrid work mandate requires physical presence at the Bangalore office three days per week. The compensation package includes a base salary range of $155,325 to $234,350 USD, supplemented by equity grants and performance-based bonus eligibility. Visa sponsorship details are not explicitly stated in the source listing; candidates requiring work authorization in India should confirm eligibility during the screening process.