DFT Engineer

About the role

Tenstorrent is seeking a DFT Engineer to contribute to the development of high-speed CPU cores and multi-chiplet System-in-Package designs. You will collaborate with global teams across the United States and Japan to implement test strategies and ensure silicon quality.

Key facts

What you'll do

• Develop and execute chip-level DFT strategies for CPU cores and multi-chiplet system architectures.
• Implement and verify DFT features such as scan chains, JTAG, and memory BIST to facilitate manufacturing tests and silicon debugging.
• Coordinate with RTL, physical design, and verification departments to maintain testability across the design lifecycle.
• Automate and analyze DFT workflows, including ATPG and fault coverage reporting, using standard EDA software.

Requirements

• Bachelor, Master, or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
• Minimum of 10 years of professional experience in DFT.
• Proficiency with industry-standard DFT tools from Synopsys and Siemens.
• Experience with TCL and Python scripting.
• Expertise in DFT planning, SoC-level silicon debug, formal verification, and signoff for inserted DFT logic.
• Ability to manage cross-functional risks and communicate resource requirements effectively.

Skills & tools

• Synopsys DFT tools
• Siemens DFT tools
• TCL
• Python
• ATPG
• Scan chains
• Memory BIST
• JTAG
• Formal verification

Practical notes

Compensation ranges from $100,000 to $500,000, including base salary and variable components, determined by experience, education, and location. Employment is contingent upon eligibility to access U.S. export-controlled technology. Candidates may need to meet specific citizenship or residency requirements, or obtain license approval from the U.S. Commerce Department, to comply with Export Administration Regulations.