Senior System Validation Engineer

About the role

Graphcore is actively seeking a Senior System Validation Engineer to join its Systems Validation team in Austin, Texas. In this role, you will be responsible for designing, implementing, and executing comprehensive validation tests for Arm-based data center System-on-Chips (SoCs). The position requires a blend of creativity and rigor as you leverage open-source benchmarking frameworks alongside purpose-built micro-benchmarks to ensure the correctness and performance of processing units, complex system memory hierarchies, high-speed communication links, and PCI Express subsystems. This role is embedded within a cross-functional environment where you will collaborate closely with hardware and firmware teams to validate AI compute platforms spanning hardware initialization, firmware configuration, and higher-level software interactions. Your work will directly influence the reliability and feature verification of Graphcore's next-generation hardware products. You will own the end-to-end validation flow for critical system components, translating architectural specifications into concrete test procedures. The position demands a methodical approach to problem-solving, where you must isolate complex interactions between hardware blocks and software workloads. Success in this role means providing the data-driven evidence required to de-risk product launches and ensure platform stability under diverse operating conditions.

Key facts

What you'll do

• Convert intricate hardware features and architectural capabilities into structured, parameterized test cases that include clear objectives, workload models, precise metrics, and definitive pass/fail criteria.
• Configure, operate, and integrate industry-standard open-source tools such as stress-ng, fio, iperf, sysbench, and lmbench into a cohesive validation workflow for data center SoCs.
• Establish sophisticated workload parameters encompassing thread and core concurrency levels, memory footprint sizes, varied access patterns, queue depths, block sizes, and CPU/NUMA affinity settings.
• Plan and execute a broad spectrum of validation scenarios including functional correctness checks, performance characterization, stress testing to uncover edge cases, and corner-case verification.
• Perform in-depth testing of CPU dynamic scaling behaviors, multi-level cache coherence and behavior, DDR and High Bandwidth Memory (HBM) bandwidth and latency characteristics, Non-Uniform Memory Access (NUMA) effects, and interconnect contention under conditions of multi-core saturation.
• Measure and evaluate Peripheral Component Interconnect Express (PCIe) input/output throughput and overall performance across configurations involving multiple devices simultaneously.
• Write efficient, maintainable micro-benchmarks using C and C++ programming languages when existing commercial or open-source tools fail to provide the necessary coverage or precision.
• Utilize Python scripting to automate repetitive test runs, orchestrate complex parameter sweeps, construct expansive test matrices, and subsequently parse, analyze, and visualize intricate sets of performance results.
• Act as a lead troubleshooter for system-level behavior and performance anomalies, working in close partnership with hardware design engineers and firmware developers to root-cause issues.
• Document validation methodologies, test outcomes, and analysis findings to create a clear audit trail and knowledge base for current and future engineering initiatives.
• Collaborate with software toolchain teams to ensure that validation feedback is incorporated into development cycles, improving product robustness over time.
• Evaluate new open-source frameworks and benchmarking utilities to determine their applicability to the specific challenges of AI accelerator validation.
• Drive the definition of regression suites that continuously verify that new hardware revisions do not introduce performance degradation or functional deviations.
• Communicate validation status, risks, and recommendations effectively to diverse stakeholders, including engineering leadership and product management.
• Champion best practices in reproducibility, ensuring that validation environments are consistent, traceable, and resilient to environmental changes.

Requirements

• Demonstrate a solid and deep grounding in Linux operating system internals, system administration, and low-level performance analysis techniques.
• Bring a background in system validation, benchmarking, or performance testing roles, with a proven track record of delivering measurable results.
• Show understanding of at least one critical domain such as CPU microarchitecture, memory subsystem design, or the PCI Express interconnect standard.
• Possess hands-on, practical experience with benchmarking and analysis tools including stress-ng, fio, and iperf at a professional level.
• Exhibit the ability to independently define complex test cases, establish parameters, and model realistic workloads based on abstract requirements.
• Show advanced proficiency in Python programming to build automation scripts, manage orchestration logic, and perform sophisticated data analysis.
• Have professional programming experience in either C or C++ to develop high-performance micro-benchmarks that stress specific hardware features.
• Capability to work methodically with minimal direct supervision, taking ownership of ambiguous problems and driving them to closure.
• Strong written and verbal communication skills necessary for documenting technical findings and interacting effectively with cross-functional engineering teams.
• Willingness to adhere to strict processes and quality gates essential for the reliable validation of security-critical data center hardware.

Nice to have

• Prior experience working with Arm-based platforms, including development boards or server environments utilizing Arm Neoverse architectures.
• Exceptionally strong C/C++ and Python skills specifically applied to system-level development, debugging, and performance automation.
• Hands-on experience with advanced performance analysis and utility tools such as perf, numactl, and taskset for low-level tuning and investigation.
• Background working on large-scale computing infrastructures or systems characterized by very high core counts and complex memory hierarchies.

Practical notes

• Graphcore is part of the SoftBank Group.
• Benefits include medical, dental, and vision coverage, FSAs, HSAs, disability and life insurance, 401(k), commuter benefits, wellness services, and an Employee Assistance Programme.
• The company supports flexible working and can adjust the interview process for candidates who need reasonable accommodations.